1. Technical Field
Embodiments of the present disclosure generally relate to an integrated circuit, and more particularly to a semiconductor device having a sense amplifier circuit and a semiconductor system including the semiconductor device.
2. Related Art
With advances in integrated circuit technology, a data storage capacity of semiconductor memory devices has been rapidly increasing, and technologies for manufacturing low-power, high-performance semiconductor memory devices have been making rapid progress. Moreover, the recent developments of portable electronic systems such as mobile phones or laptop computers are leading to demands for low-power, high-performance semiconductor memory devices.
The technologies for low-power semiconductor memory devices involve the power consumption management of core areas in semiconductor memory devices. The core area including memory cells, bit lines, and word lines may be designed in accordance with a minimum design rule for feature size, and thus scaled-down transistors with lower operation voltages may constitute the memory cells.
The technologies for high-performance semiconductor memory devices involve running the core areas at high speed. For instance, a bit-line precharge is one of the most important issues to increase the core operation speed such as an access time for data stored in the memory cells of the semiconductor memory devices to reach output pads of the semiconductor memory devices. The bit-line precharge is used to enhance an access time of cell data, which is logic high or logic low, by precharging the bit-lines with a predetermined voltage (e.g., half core voltage) before accessing the cell data.